The present invention relates in general to comparators and, more particularly, to high speed comparators with low static current drain.
In the past, high speed comparators have been used in integrated circuit applications such as analog-to-digital conversion circuits. The comparators are used to compare an input signal to a reference signal. In the past, reference signals have been provided by reference voltage generators that are external to the comparator circuit. The reference signal generators, including respective hard-wired interconnect, consume valuable space in the integrated circuit.
High speed comparators used in analog-to-digital conversion applications are constructed with multiple gain stages to achieve high gain while maintaining adequate comparison speed. The additional gain stages consume valuable silicon real estate and require large current consumption to enhance the speed of the comparator. Latching comparator stages have been implemented to achieve increased gain. However, the latching comparator requires positive feedback to its inputs to achieve the high gain. Therefore, additional circuitry is required to disconnect the inputs of the latching comparator while a comparison decision is being made. Additionally, the latching comparator continues to consume power after the comparison is completed.
Hence, a need exists for a minimum component high speed comparator that consumes minimal current drain and has the capability of self-generating reference signals.